Existing electronic interconnection techniques have several physical limitations, such as poor synchronization and low bandwidth, which cannot support the necessary interconnection density (for example, 10.sup.10 processing elements per integrated circuit chip), speed (for example, GaAs based processing elements operating at 100 MHz), and signal bandwidth requirements. To offer a possible solution to these problems, optical interconnection techniques have been suggested. [J. W. Goodman et al., Proc. IEEE, 72, 850 (1984) and A. Husain, SPIE 466, 24, (1984)].
Noninterfering free-space optical interconnections possess the potential advantage of massive parallelism, high space bandwidth product (SBWP), high temporal bandwidth product (TBWP), low power consumption, low cross talk and low time skew as compared to electronic interconnections. Free-space optical interconnection techniques have the further potential advantage that they can be used for both chip-to-chip and chip-to-module interconnections. Attention has been given to the use of various optical techniques, such as classical optics, diffraction optics, integrated optics, and holographic optics. For the purpose of implementing some important interconnection architectures, such as perfect shuffle [H. S. Stone, IEEE Trans. Comp., C-20, 153 (1971)], crossbar [M. A. Franklin, IEEE Trans. Comp., C-30, 283 (1981)], multistage interconnection networks (MINs), i.e., crossover networks [J. Jahns et al., Appl. Opt. 27, 3155 (1988)], and Clos networks [C. Clos, Bell Syst. Tech. J., 32, 406 (1953)], and other similar interconnection networks.
Recently, real-time reconfigurable optical interconnection techniques have been developed for parallel optical computing, neural networks, and optical communications using electrically addressed spatial light modulators (ESLM) with computer-generated holograms (CGH). See, for example, A. Marrakchi et al., Opt. Lett. 16, 931 (1991); E. C. Tam et al., Technical Digest of the OSA 1991 Annual Meeting, 146 (1991); J. Amako et al., Appl. Op. 30, 4622, (1991); A. Varderlugt, SPIE 634, 51 (1986). However, for this ESLM-CGH approach to become practical, higher throughput and more complicated interconnections will be required. For example, prior art implementations represented by U.S. Pat. Nos. 4,946,253; 5,115,497; 5,159,473 and 5,170,269 use a plane wave input beam and a single hologram. The latter patent relies on a deformable mirror device (DMD), which adds complexity to the reconfigurable interconnections but is otherwise also representative of the prior art that relies upon a single plane wave input beam and a single hologram to provide a reconfigurable pattern of interconnections. Such prior-art approaches do not provide sufficient flexibility for a large enough interconnection network with high enough efficiency for large-scale practical use.